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Texas Instruments /MSP432P401R /SYSCTL /SYS_SRAM_BANKRET

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Interpret as SYS_SRAM_BANKRET

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (BNK0_RET)BNK0_RET 0 (BNK1_RET_0)BNK1_RET 0 (BNK2_RET_0)BNK2_RET 0 (BNK3_RET_0)BNK3_RET 0 (BNK4_RET_0)BNK4_RET 0 (BNK5_RET_0)BNK5_RET 0 (BNK6_RET_0)BNK6_RET 0 (BNK7_RET_0)BNK7_RET 0 (SRAM_RDY_0)SRAM_RDY

BNK6_RET=BNK6_RET_0, BNK2_RET=BNK2_RET_0, BNK4_RET=BNK4_RET_0, SRAM_RDY=SRAM_RDY_0, BNK5_RET=BNK5_RET_0, BNK7_RET=BNK7_RET_0, BNK3_RET=BNK3_RET_0, BNK1_RET=BNK1_RET_0

Description

SRAM Bank Retention Control Register

Fields

BNK0_RET

Bank0 retention
BNK1_RET

Bank1 retention

0 (BNK1_RET_0): Bank1 of the SRAM is not retained in LPM3 or LPM4

1 (BNK1_RET_1): Bank1 of the SRAM is retained in LPM3 and LPM4
BNK2_RET

Bank2 retention

0 (BNK2_RET_0): Bank2 of the SRAM is not retained in LPM3 or LPM4

1 (BNK2_RET_1): Bank2 of the SRAM is retained in LPM3 and LPM4
BNK3_RET

Bank3 retention

0 (BNK3_RET_0): Bank3 of the SRAM is not retained in LPM3 or LPM4

1 (BNK3_RET_1): Bank3 of the SRAM is retained in LPM3 and LPM4
BNK4_RET

Bank4 retention

0 (BNK4_RET_0): Bank4 of the SRAM is not retained in LPM3 or LPM4

1 (BNK4_RET_1): Bank4 of the SRAM is retained in LPM3 and LPM4
BNK5_RET

Bank5 retention

0 (BNK5_RET_0): Bank5 of the SRAM is not retained in LPM3 or LPM4

1 (BNK5_RET_1): Bank5 of the SRAM is retained in LPM3 and LPM4
BNK6_RET

Bank6 retention

0 (BNK6_RET_0): Bank6 of the SRAM is not retained in LPM3 or LPM4

1 (BNK6_RET_1): Bank6 of the SRAM is retained in LPM3 and LPM4
BNK7_RET

Bank7 retention

0 (BNK7_RET_0): Bank7 of the SRAM is not retained in LPM3 or LPM4

1 (BNK7_RET_1): Bank7 of the SRAM is retained in LPM3 and LPM4
SRAM_RDY

SRAM ready

0 (SRAM_RDY_0): SRAM banks are being set up for retention. Entry into LPM3, LPM4 should not be attempted until this bit is set to 1

1 (SRAM_RDY_1): SRAM is ready for accesses. All SRAM banks are enabled/disabled for retention according to values of bits 7:0 of this register

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data